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 STD1LNK60Z-1 STQ1NK60ZR - STN1NK60Z
N-CHANNEL 600V 13 0.8A TO-92/IPAK/SOT-223 Zener-Protected SuperMESHTMMOSFET
Table 1: General Features
TYPE STQ1NK60ZR STD1LNK60Z-1 STN1NK60Z
s s s s s s
Figure 1: Package
ID 0.3 A 0.8 A 0.3 A Pw 3W 25 W 3.3 W
VDSS 600 V 600 V 600 V
RDS(on) < 15 < 15 < 15
TYPICAL RDS(on) = 13 EXTREMELY HIGH dv/dt CAPABILITY ESD IMPROVED CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
TO-92 (Ammopack)
2
3 2 1
TO-92
1
2
3
DESCRIPTION The SuperMESHTM series is obtained through an extreme optimization of ST's well established strip-based PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products.
IPAK
SOT-223
Figure 2: Internal Schematic Diagram
APPLICATIONS s AC ADAPTORS AND BATTERY CHARGERS s SWITH MODE POWER SUPPLIES (SMPS)
Table 2: Order Codes
SALES TYPE STQ1NK60ZR STQ1NK60ZR-AP STD1LNK60Z-1 STN1NK60Z MARKING Q1NK60ZR Q1NK60ZR D1LNK60Z N1NK60Z PACKAGE TO-92 TO-92 IPAK SOT-223 PACKAGING BULK AMMOPAK TUBE TAPE & REEL
Rev. 5 February 2005 1/13
STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Table 3: Absolute Maximum ratings
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter IPAK Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature 0.8 0.5 3.2 25 0.24 Value TO-92 600 600 30 0.3 0.189 1.2 3 0.025 800 4.5 -55 to 150 0.3 0.189 1.2 3.3 0.026 SOT-223 V V V A A A W W/C V V/ns C Unit
( ) Pulse width limited by safe operating area (1) ISD 0.3A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX.
Table 4: Thermal Data
IPAK Rthj-case Rthj-amb Rthj-lead Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Junction-lead Max Maximum Lead Temperature For Soldering Purpose 5 100 -275 TO-92 -120 40 260 SOT-223 -37.87(#) -260 C/W C/W C/W C
(#) When mounted on 1 inch Fr-4 board, 2 Oz Cu
Table 5: Avalanche Characteristics
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 0.8 60 Unit A mJ
Table 6: Gate-Source Zener Diode
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 7: On /Off
Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 50 A VGS = 10V, ID = 0.4 A 3 3.75 13 Min. 600 Typ. Max. Unit V
1 50 10 4.5 15
A A A V
IGSS VGS(th) RDS(on)
Table 8: Dynamic
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = V, ID = 0.4 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 0.5 94 17.6 2.8 11 5.5 5 13 28 4.9 1 2.7 6.9 Max. Unit S pF pF pF pF ns ns ns ns nC nC nC
VGS = 0V, VDS = 0V to 480V VDD = 300V, ID = 0.4 A RG = 4.7 VGS = 10 V (see Figure 21) VDD = 480V, ID = 0.8 A, VGS = 10V (see Figure 25)
Table 9: Source Drain Diode
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 0.8A, VGS = 0 ISD = 0.8 A, di/dt = 100A/s VDD = 20V, Tj = 25C (see Figure 23) ISD = 0.8 A, di/dt = 100A/s VDD = 20V, Tj = 150C (see Figure 23) 135 216 3.2 140 224 3.2 Test Conditions Min. Typ. Max. 0.8 2.4 1.6 Unit A A V ns nC A ns nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Figure 3: Safe Operating Area for IPAK Figure 6: Thermal Impedance for IPAK
Figure 4: Safe Operating Area for TO-92
Figure 7: Thermal Impedance for TO-92
Figure 5: Safe Operating Area for SOT-223
Figure 8: Thermal Impedance for SOT-223
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Figure 9: Output Characteristics Figure 12: Transfer Characteristics
Figure 10: Transconductance
Figure 13: Statis Drain-Source On Resistance
Figure 11: Gate Charge vs Gate-source Voltage
Figure 14: Capacitance Variation
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Figure 15: Normalized Gate Thereshold Voltage vs Temperature Figure 18: Normalized On Resistance vs Temperature
Figure 16: Source-Drain Diode Forward Characteristics
Figure 19: Normalized BVdss vs Temperature
Figure 17: Maximum Avalanche Energy vs Temperature
Figure 20: Max Id Current vs Tc
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Figure 21: Unclamped Inductive Load Test Circuit Figure 24: Unclamped Inductive Wafeform
Figure 22: Switching Times Test Circuit For Resistive Load
Figure 25: Gate Charge Test Circuit
Figure 23: Test Circuit For Inductive Load Switching and Diode Recovery Times
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H
A
C C2
L2 D
B3
B6
A1
L
=
=
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
TO-92 MECHANICAL DATA
mm. DIM. MIN. A b D E e e1 L R S1 W V 4.32 0.36 4.45 3.30 2.41 1.14 12.70 2.16 0.92 0.41 5 TYP MAX. 4.95 0.51 4.95 3.94 2.67 1.40 15.49 2.41 1.52 0.56 MIN. 0.170 0.014 0.175 0.130 0.094 0.044 0.50 0.085 0.036 0.016 5 TYP. MAX. 0.194 0.020 0.194 0.155 0.105 0.055 0.610 0.094 0.060 0.022 inch
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
TO-92 AMMOPACK
mm. MIN. 4.45 3.30 TYP MAX. 4.95 3.94 1.6 2.3 0.41 12.5 5.65 2.44 -2 17.5 5.7 8.5 18.5 15.5 3.8 16 4 18 6 9 12.7 6.35 2.54 0.56 12.9 7.05 2.94 2 19 6.3 9.25 0.5 20.5 16.5 25 4.2 0.9 11 3 -1 1 0.11 -0.04 0.04 0.15 0.157 0.72 0.61 0.63 0.016 0.49 0.22 0.09 -0.08 0.69 0.22 0.33 0.71 0.23 0.35 0.5 0.25 0.1 MIN. 0.170 0.130 inch TYP. MAX. 0.194 0.155 0.06 0.09 0.022 0.51 0.27 0.11 0.08 0.74 0.24 0.36 0.02 0.80 0.65 0.98 0.16 0.035 0.43
DIM. A1 T T1 T2 d P0 P2 F1, F2 delta H W W0 W1 W2 H H0 H1 D0 t L l1 delta P
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
SOT-223 MECHANICAL DATA
mm MIN. A B B1 c D e e1 E H V A1 0.02 3.30 6.70 0.60 2.90 0.24 6.30 0.70 3.00 0.26 6.50 2.30 4.60 3.50 7.00 3.70 7.30 10o 0.130 0.264 TYP. MAX. 1.80 0.80 3.10 0.32 6.70 0.024 0.114 0.009 0.248 0.027 0.118 0.010 0.256 0.090 0.181 0.138 0.276 0.146 0.287 10o MIN. inch TYP. MAX. 0.071 0.031 0.122 0.013 0.264
DIM.
P008B
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Table 10: Revision History
Date 19-Mar-2003 15-May-2003 09-Jun-2003 17-Nov-2004 15-Feb-2005 Revision 1 2 3 4 5 First Release Removed DPAK Final Datasheet Inserted SOT-223. Modified Curve 4 Description of Changes
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STD1LNK60Z-1 - STQ1NK60ZR - STN1NK60Z
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
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